The flip-flop is a device that can be in one of two states: set or reset. The flip-flop we show here has two inputs: the lower one sets the flip-flop and the upper one resets it. The flip-flop emits a steady stream of ones while it it set.
In the design above, the state of the flip-flop is stored in the small loop in the middle. The loop is six cells long, and an electron continuously circulates round this loop while the flip-flop is set.
The bottom of the loop is merged with an OR gate. The spare input to the gate is the set signal: the set signal is thus ORed into the state of the loop. At the top of the loop is an AND-NOT gate (simpler version). A suitably timed pulse on the top input to this gate will remove the electron from the loop. The example above shows the flip-flop being set (on generation 6 or thereabouts) and cleared three bit-times later (at about generation 24). The flip-flop emits a stream of four electrons during this period.
The output of the flip-flop can be taken from any suitable point on the loop.
This design of flip-flop is the main reason for our choice of 6-micron technology. A loop of length 5 can’t be made (try it!); most of the logic elements do not work at 4 microns; and so 6 is the smallest reasonable size to use.
Next: a binary adder.
This page most recently updated Fri 5 Jan 10:25:33 GMT 2024
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